Analog, RF and mmWave IC Designer

Apr 21, 2020

Summary

You have a M.Sc. or Ph.D. in electrical engineering and a solid expertise in analog, RF and/or mm-wave IC design with a silicon-proven industry track record. You worked with advanced CMOS technology nodes, preferably on high-speed wireless communication applications. You are eager to join a dynamic team developing products for next-generation 5G systems. You are a self-motivated, independent and efficient team member that has good communication skills and brings industrial IC design experience to the team.

Responsibilities

We are looking for RFIC designers who own and contribute to several parts of the RFIC, including RF front-end, wideband analog and PLL circuits, overseeing layout work and take technical lead of small teams as required.

Responsibilities include:

  • design of analog and/or RF blocks (e.g., PA, LNA, mixer, divider, multiplier, VCO, PLL).
  • design of mm-wave passive structures (e.g., TL, transformer, power splitter/combiner);
  • design of GHz-range analog baseband amplification, filtering and buffering circuits;
  • implementation of ESD, DFT, DC, biasing and calibration blocks and methods;
  • Top-level chip design and system simulation.

Requirements

The successful candidate has a proven industry track record with broad expertise in analog, RF and mm-wave IC design.

Following requirements are a must, candidates must tick all boxes to be considered:

  • degree in Electrical Engineering with at least 5 years of industrial experience in analog/RF/MMW IC design;
  • solid background in GHz analog, RF and/or mm-wave design;
  • DFT and PVT-aware design experience including biasing blocks (e.g., Bandgap, PTAT, LDO, etc.);
  • contribution to several successful product chips with analog/RF/MMW circuits;
  • advanced user of Cadence Virtuoso custom IC tool suite.

Following qualifications will make you stand out:

  • passive design experience (e.g., TL, transformer, power splitter/combiner);
  • experience with ADS, momentum, EMX, HFSS.
  • experience with ESD design and strategy, and with chip finishing (e.g., IO ring design);
  • experience with mixed-signal top-level simulation and verification;
  • knowledge of PDK development and skill coding;
  • experience with characterization and ATE data review and correlation to simulations;
  • experience with package modeling and interactions with packaging engineer

About Pharrowtech

Pharrowtech is a recent spin-off form the R&D center imec, headquartered in the dynamic city of Leuven, Belgium. We design chip and antenna technology for next-generation wireless systems in fixed internet access, VR/AR and ultra-high capacity links. Further information on Pharrowtech can be found at www.pharrowtech.com.

We are currently looking for talented and enthusiastic new members to join our growing multinational team. We offer a challenging job in a flexible work environment and an attractive compensation package. Pharrowtech is an equal opportunity employer. We are looking for candidates who best combine technical skills with deep-rooted team spirit, regardless of race, gender, religion or any other factor not relevant for the job.

Leuven is an international city in the Flemish part of Belgium, serving as an innovation hub and hosting the highly ranked KU Leuven University, the world-leading R&D center imec and several other companies and startups.

Apply Now

Location

Verbrande Poort 8,
3000 Leuven  
Belgium

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